compile xilinx simulation library for modelsim LinuxMint, Ubuntu $ cd /opt/intelFPGA_pro/17.0/modelsim_ase $ sudo ln -s linuxaloem linuxpe $ cd /opt/Xilinx/Vivado/2017.4/bin/ $ ./vivado -mode tcl $ compile_simlib -directory ~/xilinx2017.4_lnx_lib_for_modelsim -simulator modelsim -simulator_exec_path /opt/intelFPGA_pro/17.0/modelsim_ase/linuxaloem -32bit ============================================================= Windows open windows power shell $ cd c:/ $ cd Xilinx/Vivado/2017.4/bin $ ./vivado.bat -mode tcl $ compile_simlib -directory C:\\xilinx2017.4_win_lib_for_modelsim -simulator modelsim -simulator_exec_path C:\\intelFPGA_pro\\17.0\\modelsim_ase\\win32aloem -32bit 參考: xilinx ug835